High-Density Interconnect (HDI) PCBs
High-Density Interconnect (HDI) PCBs
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Printed circuit boards (PCBs) with high-density structures are commonly utilized to connect various electronic components in small size packages. These boards are equipped with numerous electrical features, which can enhance their performance. Its smaller size helps shrink the size of PCBs, and it can also improve the electrical capabilities of the devices it is connected to.
High-density interlayer (HDI) PCBs are commonly used to design advanced technology components, such as large pin-count and high-speed chips. These types of PCBs are equipped with various features, such as laser microvias, fine lines, and multiple laminations. They can be used for a wide range of applications.
High-density PCBs are fabricated using the latest technologies to offer enhanced signal integrity and functionality. They are also equipped with a smaller area for multiple features, which helps them meet the needs of diverse applications. Due to the rapid emergence of new technology, many companies are now able to create innovative products, such as driverless cars and 5G communications.
What can we do？
The electronics industry has started to experience a surge in the utilization of HDI PCBs since the introduction of new high-speed components like CSP and BGA. WTT Enterprise offers a wide range of HDI technologies, such as 1+N+1 and up to ELIC.
Technical Characteristics
◆ Up to 24L; 3+N+3; Anylayer
◆ 40/40 μm Line Width and Spacing
◆ Fine Pitch BGA with 0.35mm
◆ Plated Copper or Filling with Conductive Paste for Stacked Microvias
◆ Edge Plating
◆ Heavy Copper, Embedded Coins to provide Thermal Management Solution
◆ Planar Surface on BGA(Via-in-Pad)to Enhance Impedance Performance
◆ Enhancing Impedance Performance
◆ Laser Microvias Solutions for Radio Frequency HDI PCB
◆ Hybrid Construction with High Speed Material for HDI PCB
◆ Material Selection:High Frequency,High Speed(Low Loss/Ultra-Low Loss/Extremely Low Loss),High Thermal Conductivity,Halogen-free
Technical parameter
|
No. |
Item | Unit | WTT Capability | ||
| Mass Production | Advanced NPI | ||||
| 1 | Max. Layer Count | / | 16L; 3+N+3 | 24L; 3+N+3; Anylayer | |
| 2 | Max. Panel Size | mm (＂) | 620*710 (24.4*28.0) | 620*710 (24.4*28.0) | |
| 3 | Max. Board Thickness | mm (mil) | 4.5 (177) | 6.0 (236) | |
| 4 | Materials | / | FR4, Halogen-Free, Low Loss, High Frequency | ||
| 5 | Min. Dielectric Thickness | Core | µm (mil) | 50 (2.0) | 50 (2.0) |
| Prepreg | µm (mil) | 50 (2.0) | 40 (1.6) | ||
| 6 | Min. Drill Size | PTH- Mechanical | mm (mil) | 0.15 (6.0) | 0.10 (4.0) |
| PTH -Laser | µm (mil) | 75 (3.0) | 75 (3.0) | ||
| Blind Via - Laser | µm (mil) | 75 (3.0) | 75 (3.0) | ||
| 7 | Max. Aspect Ratio | PTH | / | 20:1 | 25:1 |
| Blind Via | / | 0.8:1 | 1:1 | ||
| 8 | Min. Annular Ring | Mechanical - Inner Layer | µm (mil) | 89 (3.5) | 89 (3.5) |
| Mechanical - Outer Layer | µm (mil) | 75 (3.0) | 75 (3.0) | ||
| Laser | µm (mil) | 50 (2.0) | 50 (2.0) | ||
| 9 | Max. Laser Depth (Skip Via, L1~L3) | µm (mil) | 200 (8.0) | 250 (10) | |
| 10 | Registration between Layers | µm (mil) | 40 (1.6) | 40 (1.6) | |
| 11 | Min. Drill to Copper (D2C) | µm (mil) | 150 (6.0) | 150 (6.0) | |
| 12 | Heavy Copper | Max. Copper Thickness | oz | 5 | 5 |
| Testing Capability | / | High Voltage 10000V, Inductance, VPP, Resistance, Surface Isolation |
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| 13 | Min. Line Width / Space | Inner Layer @ Toz Cu | µm (mil) | 35/40(1.4/1.6) | 30/40 (1.2/1.6) |
| Inner Layer @ Hoz Cu | µm (mil) | 40/50 (1.6/2.0) | 35/45 (1.4/1.8) | ||
| Inner Layer @ 1oz Cu | µm (mil) | 75/75 (3.0/3.0) | 70/70 (2.8/2.8) | ||
| Outer Layer @ 20µm Cu | µm (mil) | 50/50 (2.0/2.0) | 45/50 (1.8/2.0) | ||
| Outer Layer @ 40µm Cu | µm (mil) | 75/75 (3.0/3.0) | 70/70 (2.8/2.8) | ||
| 14 | Backdrill | Backdrill Stub Length | mm(mil) | 2~10 | 2~8 |
| Backdrill Hole Size | mm | D + 0.20 | D + 0.15 | ||
| 15 | POFV | Resin Plugging - PTH | mm | 0.15~0.80, 12:1 | 0.10~1.0, 15:1 |
| Resin Plugging - Blind Via | mm | 0.20~0.30, 0.9:1 | 0.15~0.50, 1:1 | ||
| 16 | Impedance Tolerance | <50Ω | Ω | ±4.5 | ±4 |
| ≥50Ω | % | ±10 | ±8 | ||
| 17 | Surface Finish | Phase I: ENIG, Electroplated Gold, Gold Finger, Lead-free HASL, OSP. Phase II: Imm. Tin, Imm. Silver |
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